Single Stage MOS Amplifiers

LAB 1 – SINGLE STAGE MOS AMPLIFIERS 13

Contents

Single Stage MOS Amplifiers 3

Introduction 3

Table of Equipment 3

Table of components 4

Course of Action 4

5.1 DC biasing of an NMOS transistor 4

5.2 Common-Source (CS) amplifier 5

5.3 Common-Gate (CG) amplifier 6

5.4 Common-Drain (CD) amplifier(Source-Follower) 7

Results 8

5.1 DC biasing of an NMOS transistor 8

Theoretical calculations 8

LTSPICE 8

5.2 Common-Source (CS) amplifier 8

Theoretical calculations 8

Gain = 20log Vo/ Vin = RL/ Rsig = 20 log 5×10^-8 = -146.02dB 8

LTSPICE 8

5.3 Common-Gate (CG) amplifier 9

Theoretical calculations 9

Gain = 20 log 9.977x 10^-4 = -60.02dB 9

LTSPICE 9

5.4 Common-Drain (CD) amplifier(Source-Follower) 10

LTSPICE 10

Theoretical calculations 10

Comparison and % error table 11

Discussion 11

Biasing of NMOS Transistor 11

CS Amplifier 11

CG Amplifier 11

CD Amplifier 12

Closing Argument 12

Post Lab Questions 12

SingleStage MOS AmplifiersIntroduction

This lab report aims at analyzing the single stage MOS amplifiers,specifically the NMOS transistor. It looks at its DC biasing and theoverall gain of the common-source, common-gate and the common-drainamplifiers. The specific objectives of the experiment can be listedas:

  1. To carry out an investigation of DC biasing of an NMOS transistor.

  2. To illustrate testing of an NMOS Common-Source (CS) amplifier to measure the overall gain.

  3. To show testing of an NMOS Common-Gate (CG) amplifier to measure the overall gain.

  4. To demonstrate testing of an NMOS Common-Drain (CD) (Source-Follower) amplifier to measure the overall gain.

This experiment uses a CD4007 MOSFET array that consists of a 14-pinchip with three NMOS and 3 PMOS. The type of analysis carried outwill be transient and AC analysis using LTSpice so as to obtain thegain of the amplifier in both ways and to get the bandwidth of thesignal.

Table of Equipment

Quantity

1

Oscilloscope

1

MS8217 Digital multimeter

1

EIC – 106 breadboard

1

Analog parts kit

1

Analog discovery kit

Table1: List of equipment

Table of components

Quantity

Value

1

Resistor

68k

1

Resistor

1.5k

1

Resistor

2.2k

1

Resistor

200k

1

Resistor

50 ohms

1

Resistor

1M

1

Capacitor

1uF

2

Capacitor

4.7uF

1

Function generator

100mVPP, 10kHz, offset 0V

1

DC source

5V

1

AC source

10Khz

2

Probes

1

NMOS

Table2: List of components

Course of Action5.1 DC biasing of an NMOS transistor

Figure1: DC biasing of an NMOS transistor

  • The CD4007 pin 7 was connected to the source node. Source and body were shorted for this amplifier configuration

  • VRD and VRS were measured and recorded

  • The corresponding currents ID and IS were calculated

  • Power was disconnected

  • % error was used to compare lab and LTSPICE results.

5.2 Common-Source (CS) amplifier

Figure2: Common source amplifier

  • The circuit was arranged as above, including the capacitors and AC source.

  • Values of the capacitors were measured and confirmed using the multimeter

  • The oscilloscope was assembled and connected as shown by RL in the circuit diagram in Figure 2 above.

  • The DC supply VDD was turned on

  • The function generator was set to 100mVpp, 10kHz frequency and 0 offset.

  • The oscilloscope was used to obtain the waveforms of Vs and Vo. The phase shift of Vo was compared to that of Vs.

  • The gain of the amplifier was calculated

  • The same setup was repeated in LTSPICE

  • Through transient analysis, Vs and Vo waveforms, as well as the gain of the amplifier, were obtained

  • Ac analysis was done to obtain Vo/Vs in dB, to get the maximum gain(dB) and to calculate the bandwidth and its associated low and high frequencies.

5.3 Common-Gate (CG) amplifier

Figure3: Common gate amplifier

  • The circuit in Figure 3 above was connected after confirming the values of the capacitors with a multimeter.

  • The DC supply was turned on

  • The function generator was set to 100mVpp, 10 kHz.

  • The oscilloscope was used to obtain the waveform of Vs and Vo, as well as the phase shift of Vo with respect to Vs

  • Power was disconnected and the same set up was simulated in LTSPICE

  • The AC and transient analysis were carried out using the following settings: Voff = 0, AC = 1, VAMPL = 0.05, FREQ = 10k

  • Waveforms of Vs and Vo were obtained and the gain of the CG amplifier calculated

  • The dB frequency response was obtained from the graphs, as well as the maximum Gain(dB), fL, fH and BW

  • %error was used to compare lab and LTSPICE results

5.4 Common-Drain (CD)amplifier(Source-Follower)

Figure4: Common-drain amplifier

  • The circuit was connected as shown in figure 4 above after having confirmed the values of the components with a multimeter.

  • The DC supply was turned on

  • The function generator was set to 0.4Vpp, 10 kHz

  • Vs and Vo waveforms were obtained from the oscilloscope, and the phase-shift of Vo determined with respect to that of Vs.

  • The gain of the amplifier was calculated and then power was disconnected

  • The same setup was simulated in LTSPICE. AC and transient analysis were done after setting the signal source at VOFF = 0, AC = 1, VAMPL = 0.2, FREQ = 10k

  • Waveforms for Vs and Vo were obtained and the gain calculated under transient analysis

  • The dB frequency response was obtained from the graphs, as well as the maximum Gain(dB), fL, fH and BW

  • %error was used to compare lab and LTSPICE results.

Results5.1 DC biasing of an NMOS transistorTheoretical calculations

The theoretical value of VDS should be close to 2.5V.

LTSPICE

VDS = 2.027V, VRD = 5V, VRS = 2.03V

ID = VRD/ RD = 5V/ 2.2k = 2.27mA

IS = VRS/ RS = 2.03V/1.5k = 1.35mA

5.2 Common-Source (CS) amplifier Theoreticalcalculations Gain= 20log Vo/ Vin = RL/ Rsig = 20 log 5×10^-8 = -146.02dB LTSPICE

Figure5: V in for CS amplifier

Figure6: V out for CS amplifier

Figure7: Vs in dB for CS amplifier

Figure8:Vout in dB for CS amplifier

Transient analysis: Gain = Vo/ Vin = 35nV/50mV = 3.5 x 10^-8

AC analysis: Gain = 20log 3.5 x 10^-8 = -149.12dB

fH = 300Hz from bode plot, fl = 150Hz. BW = 300-150 = 150Hz

5.3 Common-Gate (CG) amplifierTheoretical calculations Gain= 20 log 9.977x 10^-4 = -60.02dBLTSPICE

Figure9: Vin for CG amplifier

Figure10: Vout for CG amplifier

Figure11: AC analysis for CG amplifier

Transient analysis: Gain = Vo/ Vin = 10mv/5V = 500

AC analysis: Gain = 20log 500 = -53.97dB

5.4 Common-Drain (CD)amplifier(Source-Follower)LTSPICETheoretical calculations

Gain = 20log 50/1000000 = -86.02dB

Figure12: Vin for CD amplifier

Figure13: Vout for CD amplifier

Figure14: AC analysis for CD amplifier

Transient analysis: Gain = Vo/ Vin = 15nV/200mV = 7.5 x 10^-8

AC analysis: Gain = 20log 7.5 x 10^-8 = -142.5dB

fH = 100Hz from bode plot, fl = 35Hz. BW = 100-35 = 65Hz

Comparison and % error table

There was a variation in the theoretical results when compared to thesimulated ones.

Theoretical value

Simulated value

%error

DC biasing of NMOS

VDS = 2.5 V

VDS = 2.03V

18.8%

CS amp

-146.02dB gain

-149.12 dB gain

2.12%

CG amp

-60.02 dB gain

-53.97 dB gain

10.08%

CD amp

-86.02 dB gain

-142.5 dB gain

65.7%

Table3: %error

DiscussionBiasing of NMOS Transistor

The value of VDS is half that of the DC source voltage due to thearrangement of the capacitors and the shorting of the NMOS. There isa distinct variation between the ideal [value and the one got fromsimulation due to the noise levels of the components used. The %error between the measured and simulated value is due to theconsideration of the MOSFET parameters in the simulation and the useof a voltage strobe that measured voltage at only an instance.

CS Amplifier

There is gain in the two circuits, but the value of the two variesbecause of the effect of coupling capacitors in the circuit. There isa huge error between the calculated and simulated gain, probably dueto the calculation methods used and the resistors chosen to create avoltage divider and determine the final input and output voltagevalues. The variation that brings about the % error between thesimulated AC analysis gain and the one retrieved form theoreticalcalculations is due to the inaccurate MOSFET parameters applied inthe simulation circuit.

CG Amplifier

There is a 7dB difference in the simulated and calculated gains ofthe common-gain amplifier. The difference is smaller than in thecommon-source amplifier. In the CG amplifier, the simulated gain islower, probably due to the MOSFET parameters and the electronicoccurrences surrounding the simulation circuit. The couplingcapacitors used in the circuit also brought about a variation in thegains due to the changes in voltages created within the circuit.

CD Amplifier

Common drain amplifiers have a gain of around -140dB when connectedaccording to the circuit diagram shown. The calculated value is lowerat -86.02dB. This low value could be as a result of the 1Mega ohmvalue of the oscillator connected in the circuit and the arrangementof the coupling capacitors.

Closing Argument

The experiment was successful in determining the various outcomes ofthe practical lesson. All the four objectives were achieved and therespective gains and voltages were successfully compared. The biggestproblem in the experiment was to assemble the correct equipment andto get everything running in the lab, after which getting the graphresults would have been easier. This exercise can be improved byusing a better simulation tool such as Proteus that is easier tocreate circuits in and view simulations.

Post Lab Questions

1. a.) It doubles the conduction parameter of the NMOS

b.) Decreases the gain of the amplifiers because it affects theoutput voltage

c.) Reduces the gain of the CS amplifier

d.) Increases the gain of the CS amplifier

2. The three vary in their gain